1. Field of the Invention
The invention relates to the field of buffer circuits and, in particular, to buffer circuits for high speed memory circuits.
2. Prior Art
Metal-oxide-silicon (MOS) circuits and devices are well known and used in the prior art and are recognized as low power consuming circuits. A typical MOS buffer circuit is found in MOS Field-Effect Transistors and Integrated Circuits, Paul Richman, published in 1973 by John Wiley & Son (see Figure 7.20 and the accompanying text). While MOS circuits have the advantages of power consumption, and high-functional packing density, low cost and simplified masking layout, nonetheless bipolar circuits have had to be used for buffer circuits where fast switching times were required due to the limited speed of MOS circuits. In addition, with the advent of even higher speed memory circuits it has become necessary to increase the switching times of the buffer circuits while still maintaining compatability with TTL circuitry and retaining the low power consumption desirable in all integrated circuits.
Accordingly, it is a general object of the present invention to provide an improved input buffer circuit for memory circuits.
It is another object of the present invention to provide an improved input buffer circuit which will achieve fast switching time without sacrificing low power consumption.
It is yet another object of the present invention to provide a high speed input buffer circuit using MOS circuitry.